microprocessor

UltraSPARC-III .18 micron 64-bit RISC microprocessor
UltaSPARC-III based systems are available since 27 Sep 2000.
UltaSPARC-III is completely new design. It is is focused on scalability, and is able to scale to several hundreds processors in a single system. Embedded DRAM controller eases contention between processors for access to memory. A switch controls the path of data over the system bus between the CPU and memory and can concentrate data flows into a wide stream at relatively high data rates.
Operating frequencies are 600 and 750 MHz, performance is 395 SPECint2000 and 421 SPECfp2000 @ 750 MHz 8 MB cache. Contains about 29,000,000 transistors, power dissipation is about 70 Watts. 900MHz version of UltraSPARC-III is in sample production now. Shipments are expected to begin in Dec 2000. Its performance is 467 SPECint2000 and 482 SPECfp2000
An information on the UltraSPARC-III could also be found at UltraSPARC-III home-page from Sun

UltraSPARC-II (STP1031) .25 micron 64-bit RISC microprocessor

The UltraSPARC-II is a high-performance, highly-integrated superscalar processor implementing the SPARC-V9 architecture. It is capable of sustaining the execution of up-to four instructions per cycle even in the presence of conditional branches and cache misses. The UltraSPARC-II supports both 2D and 3D graphics as well as image processing, video compression and decompression, and video effects through the VIS Instruction Set. VIS provides high levels of multimedia performance, including real-time H.261 video compression/decompression and a single stream of MPEG-2 decompression at full broadcast quality with no additional hardware support.
The target operating frequencies are 250, 300, 336, 360, 400, 450 and 480MHz, Performance results are 234 SPECint2000, 291 SPECfp2000 (18.3 SPECint95, 30.1 SPECfp95) @ 400 MHz 8 MB L2 cache .

UltraSPARC IIi .35 micron 64-bit RISC microprocessor

The UltraSPARC i-Series provide a single-chip system solution incorporating a CPU, PCI bus interface, and memory controller. Contains 0.25 to 2 MB L2 cache. The target operating frequencies are 270, 300, 333, 360 and 440 MHz, performance is 18.1 SPECint95, 22.7 SPECfp95 @ 440 MHz 2 MB cache.

UltraSPARC-I (STP1030) .5 micron 64-bit RISC microprocessor

The UltraSPARC-I is a high-performance, highly-integrated superscalar processor implementing the SPARC v9 64-bit RISC architecture. The UltraSPARC-I supports 2D, 3D graphics, image processing, video compression and decompression and video effects through the VISual Instruction Set. The target operating frequencies are 143, 167 and 200 MHz, performance is 7.72 SPECint95, 11.4 SPECfp95 @ 200 MHz 1 MB cache.

microSPARC-IIep 32-bit RISC microprocessor

Suited for low-cost uniprocessor applications. Includes PCI Controller and PCI Bus Interface on chip. Built with the core operating at a low voltage of 3.3V for optimized power consumption. The target operating frequency range is 100-125MHz, performance is 72 SPECint92, 59 SPECfp92 @ 100 MHz.

microSPARC-II 32-bit RISC microprocessor

Suited for low-cost uniprocessor applications. SPARC v8 compliant. Performance is 1.59 SPECint95, 1.99 SPECfp95 @ 110 MHz without L2 cache.

Outdated Microprocessors
SuperSPARC-II (STP1021A) 32-bit RISC microprocessor

SPARC v8 compliant. Performance is 3.11 SPECint95, 3.10 SPECfp95 @ 75 MHz 1 MB L2 cache.

SuperSPARC-I (STP1020N) 32-bit RISC microprocessor

The SuperSPARC-I is the oldest member of the SuperSPARC family of microprocessor products. The SuperSPARC-I is a highly integrated, high performance superscalar microprocessor designed using a state-of-the-art BiCMOS process. The SuperSPARC-I is intended for use in a broad range of applications from uniprocessor desktop machines to large multiprocessor servers. SPARC v8 compliant. Performance is 1.13 SPECint95, 1.38 SPECfp95 @ 40 MHz without L2 cache.

Fujitsu SPARC Microprocessors

What's new in Fujitsu Microelectronics Worldwide

SPARC64-GP .24 micron 64-bit RISC microprocessor

The Fujitsu SPARC64-GP is superscalar, super-pipelined processor implementing the SPARC V9 architecture, designed and manufactured by Fujitsu.
Contains 17,600,000 transistors. The target operating frequencies are 225, 250, 272 and 296 MHz, performance is 19.2 SPECint95, 30.5 SPECfp95 @ 296MHz 8 MB L2 cache.

MB86860 SPARClite 32-bit embedded RISC microprocessor

Targeted at network system applications, including hubs, routers and systems that support ATM technology; suitable for high-speed color laser printers.
The MB86860 features a superscalar RISC CPU core and 64-bit SDRAM interface, along with 16KB of each of instruction and data cache. The MB86860 series performs integer arithmetic operations compatible with conventional SPARC instructions. Its SPARClite buses are compatible with the other SPARClite family of devices. The target operating frequency is 200MHz.

Outdated Microprocessors
TurboSPARC (MB86907) 32-bit low-cost RISC microprocessor

Designed to support low-cost uniprocessor systems, TurboSPARC is ideal for applications needing low-cost, single processor platforms like the SPARCstation 5. The target operating frequency is 170MHz, L2 cache -- 512KB, performance is 3.53 SPECint95, 3.00 SPECfp95.

Digital Alpha Microprocessors

What's new in Alpha Microprocessors AlphaServer

Alpha 21464 (EV8) "Arana" 64-bit SMT microprocessor
Future Digital/Compaq's microprocessor, scheduled for production in 2003.
It is expected to be fabricated in 0.125-micron SOI-compatible CMOS process with copper interconnects and low-k dielectrics. The 21464 should be available in 1.2GHz through 2GHz bins; at its 1.4GHz design center the microprocessor is expected to deliver ~140-200 SPECint95 and ~300-400 SPECfp95 of performance. Other 21464 characteristics are: transistor count - about 250 million, power dissipation - 150W, Vdd - ~1.2V. Alpha 21464 will implement Simultaneous MultiThreading (SMT) technique. The technique exploits thread-level parallelism to make better use of processor resources. Use of SMT will make EV8 microprocessor act like either a four-way SMP system or 8-wide issue superscalar depending on workload features.
An information on the 21464 could be found in "Designers cut fresh paths to parallelism " by EE Times staff and in slide presentation at Microprocessor Forum '99 "Simultaneous Multithreading: Multiplying Alpha Performance"PostScript format by Joel Emer [ "Simultaneous Multithreading: Multiplying Alpha Performance" Microsoft PPT format]

Alpha 21364 (EV7) .18 micron 64-bit RISC microprocessor
Forthcoming Digital/Compaq's microprocessor. Shipments of 21364-based system are expected to begin in early 2001. Performance will be 70 SPECint95 and 120 SPECfp95 at speeds above 1 GHz.
The 21364 is scheduled to debut at 750MHz and will eventually push to 1.2GHz. It will also include an integrated memory controller and a faster, next-generation EV7 bus. It will be designed for use in symmetric-multiprocessing implementations, where up to 64 processors can be ganged in a single server. On-chip transistor count will jump to the 100 million range.
The new Alpha will also implement some of the same advanced code-optimization techniques Intel Merced is eyeing. The major difference between Merced and Alpha 21364 in this respect is static vs. dynamic. That is, Merced is doing everything as statically as it possibly can, the 21364 is doing everything as dynamically as it possibly can.
21364 (EV7) will be followed by 21364A (EV78) processor - the same design, re-implemented in 0.125 micron IC process
An information on the 21364 could be found in slide presentation at Microprocessor Forum '98 "Alpha 21364: A Scalable Single-chip SMP" by Peter Bannon, Compaq and in articles "Intel, Compaq gird for 64-bit battle" by Alexander Wolfe, EE Times, and "Battle lines drawn for next-generation MPUs" by EE Times staff.

Alpha 21264B (EV68) .18 micron 64-bit RISC microprocessor

The 21264B is a re-implementation of 21264A (EV67) microprocessor in 0.18 micron IC process. Frequency range is from 833 through 1250MHz. Performance results are 544 SPECint2000 and 658 SPECfp2000 at 833 MHz, with 8MB L2 cache
Currently it is in sample production. It is expected to ship in systems by the end of 2000.

Alpha 21264A (EV67) .25 micron 64-bit RISC microprocessor

The 21264A is re-implementation of 21264 (EV6) microprocessor in 0.25 micron IC process. Clock frequencies are 600, 667, 700, 731, 750 and 833MHz. Performance results are 533 SPECint2000 and 644 SPECfp2000 (50.0 SPECint95 and 100.0 SPECfp95) @ 833MHz.

Alpha 21264 (EV6) .35 micron 64-bit RISC microprocessor

The 21264 has 64KB L1 instruction cache and 64KB L1 data cache. Optional off-chip L2 cache is accessed over a 128-bit-wide backside bus. The 21264 instructions include specially developed Motion Video Instructions (MVI) to enhance visual computing and multimedia performance, enabing Alpha to compress DVD video using the MPEG2 video standard and Dolby AC3 audio standard in software and in full real-time.
The 21264 contains 15,200,000 transistors, die size is 16.7mm x 18.8mm = 314 mm2 power dissipation is about 90 Watts at 575MHz. Clock frequencies are 466, 500, 525 and 575MHz. Performance results are 313 SPECint2K, 422 SPECfp2K (27.7 SPECint95, 58.7 SPECfp95) at 500 MHz with 4MB L2 cache
The best source of information on the 21264 features probably is an article "Alpha 21264 stakes off the claim - long before Merced" by Tom R. Halfhill, c't.
An information on Alpha 21264 could also be found in press release from Digital, in "The 21264..." Slide Presentation from Microprocessor Forum by Jim Keller, Digital, and in arcicle "Digital 21264 Sets New Standard..." by Linley Gwennap, MicroDesign Resources.

Alpha 21164 (EV56) .35 micron 64-bit RISC microprocessor

The target operating frequencies are up-to 612 MHz, performance is 18.8 SPECint95, 29.2 SPECfp95 @ 600 Mhz 8 MB L3 cache.
Additional information on Alpha 21164 could be found in the Digital Technical Journal, Volume 7, Number 1, Special Issue 1995.

Alpha 21164PC .35 micron 64-bit RISC microprocessor

The 21164PC is based on Digital 21164 Alpha microprocessor. It provides unparalleled performance of multi-media authoring, high-quality video conferencing, and 3D graphics. Unlike its competition, the 21164PC includes Digital Semiconductors MVI, enabling real-time video conferencing and MPEG II decode without additional hardware assistance.
The target operating frequencies are 400, 466, and 533 MHz, estimated performance is 14.3 SPECint95, 17.0 SPECfp95 @ 533 MHz.

Outdated Microprocessors
Alpha 21066A 64-bit RISC microprocessor

The 21066A is a highly integrated implementation of Digital's Alpha architecture for high-performance, PCI-based systems. Onchip functions include an industry-standard PCI I/O controller and a 21066A-exclusive graphics accelerator. The 21066A is offered with clock frequencies of 233 MHz and 100 MHz.

Alpha 21064A .5 micron 64-bit RISC microprocessor

The target operating frequencies are 200, 233, 275, and 300 MHz.

Alpha 21064 .75 micron 64-bit RISC microprocessor

The chip implements 64-bit architecture, designed to provide a huge linear address space and to be devoid of bottlenecks that would impede highly concurrent implementations.
An information on Alpha 21064 could be found in the Digital Technical Journal, Volume 4, Number 4, Special Issue 1992.

Hewlett-Packard Microprocessors

PA-8700 .18 micon 64-bit RISC microprocessor
Future HP microprocessor, expected to ship in servers and workstations in the first half of 2001. It was taped out in late March 2000.
New HP processor keeps basic PA-8x00 architecture unchanged. The PA-8700 employs a .18 micron, silicon-on-insulator copper CMOS process, allowing for 2.25MB of on-chip cache (750KB I-cache + 1.5MB D-cache) -- the largest of any microprocessor and a 50 percent increase over the PA-8600. The PA-8700 contains 186 million transistors and occupies 16 x 19 mm = 304 mm2 of silicon. It is designed to operate at frequencies at and above 800MHz.
For more information see press release HP Reveils PA-8700 Chip Details and HP white paper PA-RISC 8x00 Family of Microprocessors with Focus on PA-8700 (in PDF format).

PA-8600 .25 micron 64-bit RISC microprocessor

PA-8600 is fabricated in the same IC process as previous PA-8500 microprocessor and it shows minor architecture changes from its predecessor. But re-implementation allowed for rising clock frequency up-to 552 MHz. PA-8600' performance results are 42.1 SPECint95, 64.0 SPECfp95 at 552MHz, without additional off-chip caches. Die size is 21.3 x 22 mm = 469 mm2, transistor count is about 140 millon.
New performance features include new cache algorithms to enable faster access to data, and cache prefetch technology to load data from memory faster. High-availability features include error checking and correcting (ECC) on the 1.5MB of on-chip cache to improve real-time error correction. The PA-8600 will be enhanced further by the addition of lockstep capability, a technology that enhances high availability by enabling systems to compare processing steps and recover if errors are detected.
For more information see press release HP Unveils PA-8600 Chip Details

PA-8500 .25 micron 64-bit RISC microprocessor

Incorporates 1.5 MB (512KB I-cache + 1MB D-cache) of L1 cache memory on the chip. Contains 140,000,000 transistors and occupies 469 mm2 of silicon. The target operating frequencies are 360, 400 and 440MHz, performance is 31.8 SPECint95, 52.4 SPECfp95 @ 400Mhz, without additional caches.

PA-8200 64-bit RISC microprocessor

The target operating frequencies are 200 and 236 MHz, performance is 17.4 SPECint95, 26.3 SPECfp95 @ 236Mhz 4MB external cache.
An information on the PA-8200 could also be found in HP Journal article "Four-Way Superscalar PA-RISC Processors".

PA-8000 .5 micron 64-bit RISC microprocessor

The PA-8000 is the first processor to implement the complete PA-RISC 64-bit architecture. "Intelligent execution" is a concept denoting synergistic operation of all critical elements of the PA-8000. The set of functional units contains 10 instruction-execution units. The target operating frequencies are 160 and 180 MHz, performance is 12.3 SPECint95, 20.2 SPECfp95 @ 180 MHz.
An information on the PA-8000 could also be found in HP Journal article "Four-Way Superscalar PA-RISC Processors".

PA-7300LC 32-bit low-cost RISC microprocessor

Several years ago it was determined that HP could best meet the needs of higher volume, more cost sensitive products by developing a set of CPUs tuned to the special requirements of these systems...
An information on the PA-7300LC could also be found in HP Journal article "The PA 7300LC Microprocessor: A Highly Integrated System on a Chip".

Outdated Microprocessors
PA-7200 .55 micron 32-bit RISC microprocessor
PA-7150 .8 micron 32-bit RISC microprocessor
PA-7100LC .8 micron 32-bit RISC microprocessor